Accession Number : ADA210316


Title :   Final Evaluation of MIPS M/500


Descriptive Note : Final rept.


Corporate Author : CARNEGIE-MELLON UNIV PITTSBURGH PA SOFTWARE ENGINEERING INST


Personal Author(s) : Klein, Daniel V ; Firth, Robert


Full Text : https://apps.dtic.mil/dtic/tr/fulltext/u2/a210316.pdf


Report Date : Nov 1987


Pagination or Media Count : 219


Abstract : In response to a request from the DoD, an analysis of a Reduced Instruction Set Computer (RISC) processor, the MIPS M/500, was performed. All aspects of processor capabilities and support software were evaluated, tested, and compared to familiar Complex Instruction Set Computer (CISC) architectures. In all cases, the RISC computer and its support software performed better than a comparable CISC computer. This report provides the general and specific results of these analyses, along with the recommendation that the DoD and other government agencies seriously consider this or other RISC architectures as a highly viable and attractive alternative to the more familiar but less efficient CISC architectures.


Descriptors :   *COMPUTER ARCHITECTURE , *COMPUTER PROGRAMS , COMPUTERS , ASSEMBLERS , STANDARDS , INSTRUCTIONS , COMPILERS , TEST AND EVALUATION


Subject Categories : Computer Programming and Software
      Computer Hardware


Distribution Statement : APPROVED FOR PUBLIC RELEASE