Accession Number : AD0463322


Title :   A STATISTICAL TOLERANCE ANALYZER MODEL,


Corporate Author : ILLINOIS UNIV AT URBANA


Personal Author(s) : Burnside, Thomas E


Report Date : 02 Nov 1964


Pagination or Media Count : 55


Abstract : This report is a presentation of the logic, circuits, printed-circuit board layouts and interconnections for a model of a statistical tolerance analyzer. The device analyzes a simple diode circuit. The probability density of V sub IN versus V sub IN and the probability density of v sub d (diode voltage) versus v sub d is known. The problem is to find the probability density of v sub out versus v sub out. (Author)


Descriptors :   *TEST EQUIPMENT , ELECTRONIC EQUIPMENT , STATISTICAL ANALYSIS , STATISTICAL ANALYSIS , STATISTICAL PROCESSES , TOLERANCES(MECHANICS) , PRINTED CIRCUITS , CIRCUIT INTERCONNECTIONS , SEMICONDUCTOR DIODES , VOLTAGE , DENSITY , PROBABILITY , GATES(CIRCUITS) , POWER SUPPLIES , DISCRIMINATORS , EQUATIONS


Distribution Statement : APPROVED FOR PUBLIC RELEASE