Accession Number : AD0462146


Title :   PLANAR INTEGRATION OF THIN FILM UNITS


Descriptive Note : Rept. no. 4 (Final), 15 Jan 1964-14 Jan 1965


Corporate Author : WESTINGHOUSE DEFENSE AND SPACE CENTER BALTIMORE MD


Personal Author(s) : Lauriente, M ; Harper, C A ; Winter, J M ; Wyble, C W


Full Text : https://apps.dtic.mil/dtic/tr/fulltext/u2/462146.pdf


Report Date : 14 Jan 1965


Pagination or Media Count : 104


Abstract : Three organic materials and five inorganic materials were investigated for mounting 'chip' parts and silicon semiconductor integrated circuits into recesses in microcircuit wafers of glass and alumina and for their ability to provide a suitable surface for the subsequent formation of a deposited electrical conductor. On the basis of preliminary thermal cycling tests a lithium silicate filled diphenyl oxide varnish was selected as the most feasible material for the intended application. Deposited electrical conductors were chromium-copper-gold. Samples were exposed to low temperature, moisture cycling, and thermal shock and evaluated for adhesion of deposited conductors, corrosion and migration, interconnection resistance and insulation resistance. Test results are given and analyzed and a failure mechanism study conducted to determine origin of failures. Factual data includes a stress analysis of the assembly system, properties of the various materials investigated, techniques employed for substrate and component fabrication, thin film deposition techniques and flow diagrams of the process employed.


Descriptors :   *THIN FILMS , *SUBMINIATURE ELECTRONIC EQUIPMENT , STABILITY , GLASS , CIRCUIT INTERCONNECTIONS , ENVIRONMENTAL TESTS , PACKAGING , SILICON , OXIDES , PROCESSING


Subject Categories : Electrical and Electronic Equipment


Distribution Statement : APPROVED FOR PUBLIC RELEASE